Intel® FPGAs Head to the Mainstream Data Center - Programming for All!

Historically, Field Programmable Gate Arrays (FPGA) were specialty products programmed in exotic languages by elite experts with detailed, system-specific knowledge. Intel seeks to democratize FPGA acceleration, broaden their use and ease adoption in the data center. The rare expertise of FPGA programming was a serious inhibitor to widespread adoption.

Today, Intel announced a new set of software tools to make FPGA programming accessible to mainstream developers, a major leap forward for customizable silicon solutions that complement the endless diversity of customer-defined workloads, including 5G network processing, artificial intelligence, data and video analytics, machine learning and more.

Intel announced three software tools that dramatically increase ease-of-use for Intel® Xeon® processor applications and FPGA developers. The tools launched today include:

Enhanced Performance, Simplified

With the Acceleration Stack for Intel Xeon CPU with FPGAs, developers now have access to a complete collection of software, firmware and tools designed to make it easier and significantly faster to develop and deploy Intel FPGAs for workload optimization in the data center. This solution enables unprecedented code re-use for data center-quality Intel FPGAs. It offers the world’s first common developer interface across all Intel FPGA data center products. The optimized developer interface abstracts hardware specific FPGA resource details from the application developer, letting them focus on their unique value add instead of dealing with the minutiae of communicating with the FPGA.

A Common Developer Interface

The Open Programmable Acceleration Engine (OPAE) Technology, included as part of the common developer interface between the Intel Xeon processor and an accelerator, is open code that improves developer productivity with a lightweight, consistent API across FPGA accelerator generations and platforms. Intel made this capability open to support a strong developer ecosystem for Intel Xeon processors with FPGA acceleration. The hardware-specific FPGA resource details are abstracted from the application developer, letting them focus on accelerating their workload instead of figuring out how to communicate with the FPGA. As part of this announcement, Intel has released OPAE on GitHub. Open sourcing the technology will help foster an open ecosystem and encourage the use of FPGA acceleration in the data center.

Unlocking FPGA Acceleration for Software Engineers with OpenCL

In addition to traditional Register Transfer Language (RTL) development, the Acceleration Stack supports the Intel FPGA SDK for OpenCL. Supporting both RTL and OpenCL gives developers options to create custom accelerator functions that run on Intel FPGAs. Developers are free to choose whichever flow is most appropriate for their situation.

OpenCL is an industry standard, C-based programming language that allows users to abstract away hardware-specific development and use a higher-level software development flow that accelerates time-to-market. We see customers using OpenCL with Intel FPGAs reduce their development time to weeks instead of months. OpenCL can help a developer reduce the amount of accelerator code dramatically, when compared to traditional means of FPGA development.

Image: Traditional FPGA Programming

Learn More, Get Started Today

Our state-of-the-art Intel® Stratix® 10 FPGAs and brand-new Intel Xeon Scalable processors will power the new generation of data center workloads that can transform our lives and businesses. Our exciting new software toolkit will make it dramatically simpler for mainstream developers to implement this customizable powerhouse combination. I hope you’ll get started today.