Intel® AVX-512 - Instruction Set for Packet Processing Technology Guide
Last Updated: Apr 06, 2021
This paper is the first in a series of white papers focusing on how to write packet processing software using the AVX-512 instruction set. It provides a brief overview of the Intel® AVX-512 instruction set and describes the microarchitecture optimizations for the instruction set in the latest 3rd Generation Intel® Xeon® Scalable Processors.
Categories
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NFVI Hardware
NFVI OS/Virtualization
Open Source Solutions
Intel Technologies and Platforms
Intel Atom Processor
2nd gen Intel Xeon Scalable processor
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Device Edge
On Premises
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Optimizations
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Intel QuickAssist Technology (QAT)
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