hidden text to trigger early load of fonts ПродукцияПродукцияПродукцияПродукция Các sản phẩmCác sản phẩmCác sản phẩmCác sản phẩm المنتجاتالمنتجاتالمنتجاتالمنتجات מוצריםמוצריםמוצריםמוצרים


Related Content

5G Hardware Acceleration with Intel® Agilex™ FPGA Based Silicom SmartNICs

Istvan Szonyi at Silicom

May 14 2024 | 56 mins

  • Details

Disaggregated and virtualized Radio Access Network (RAN) enables 5G market competition and customer choice with lower equipment costs, and improved network performance. Open RAN deployments can be implemented in vendor-neutral hardware and software-defined technology, based on open interfaces and community-developed standards. Many 5G use-cases run well on pure CPU platforms, but as bandwidths increase and advanced antenna systems are deployed, hardware oftentimes struggle to keep up and start driving impractical levels of power consumption. Hardware acceleration is needed for the compute-heavy Layer-1, or physical layer. Our Intel® Agilex™ FPGA based reconfigurable SmartNICs can bring in flexible hardware acceleration options with in-line or look-a-side LDPC and SD-FEC related workload offloading.


- Istvan Szonyi, VP of Engineering