Re-Architecting the Data Center
As the capabilities and capacity of data centers and networks advance, they allow us to do incredible things, like sequencing the genome in less than a day, then using artificial intelligence to make precise health care recommendations for each patient's unique condition. At Intel, we take our role as the provider of the foundation of data center computing seriously. That's why this summer, we will unveil our next-generation Intel® Xeon® processor family (code-named "Skylake"), which represents the biggest set of data center platform advancements in this decade. To reflect the magnitude of the innovations we are bringing to market with this platform, we will rename the family the Intel Xeon Processor Scalable family.
Get a preview in this blog post from Lisa Spelman, Vice President, Data Center Group, and General Manager, Intel Xeon Products and Data Center Marketing.
Chinese Language Courses Now Available in Intel® Network Builders University
The Intel® Network Builders University is excited to announce another expansion in multilingual content and deeper technical content.
For our students interested in OpenDaylight* and vector packet processing (VPP), we have added a new course covering this topic. VPP is a high performance packet-processing framework that can run on commodity CPUs. It can also act as Open vSwitch* (OvS) alternative in most cloud data center and telco SDN/NFV scenarios. This course examines how OpenDaylight service function chaining (SFC) leverages VPP to implement network service header (NSH)-based service function chaining.
You can now find all eight of the below foundational courses in all four languages:
- Software Defined Infrastructure (SDI) Vision
- Network Transformation
- Network Virtualization
- Virtualization Concepts
- Network Functions Virtualization (NFV)
- Cloud Infrastructure as a Service (IaaS) with OpenStack*
- Software Defined Networking (SDN)
- Deployment Use Cases
You will also find four courses covering Virtual Enterprise Customer Premises Equipment (vE-CPE) in all four languages:
- vE-CPE Overview
- vE-CPE Reference Architecture
- vE-CPE Use Cases
- vE-CPE Operations
There are 13 new courses added to the university this month with even more informative content on the way, so login and experience it firsthand.
Intel Network Builders University is one of three learning centers in Intel® Builders University, which also includes the Intel® Cloud Builders University and Intel® Storage Builders University. Intel Builders University offers software defined infrastructure-focused technical training for communication service provider customers, enterprise customers, and ecosystem partners. It is a resource to accelerate the deployment of virtualized technologies through education.
The online portion of the University is available through a simple registration here. Registrants have access to all of the content in the three learning centers and the new courses added each month. Please take a look and after exploring the offerings, and let us know what content you would like to see added to the university.
Expanding the Intel® Builders Program – Intel® Fabric Builders
Last month was marked by the launch of a brand new website for Intel® Fabric Builders. The new and improved Intel Fabric Builders website features full integration with the other Intel Builders websites, useful information on Intel® Omni-Path Architecture, information on how partners and end users are using Intel Omni-Path Architecture to solve real world issues, and a searchable Ecosystem Partners page that features microsites and links for our Intel Fabric Builders partners.
Welcome Our New Ecosystem Partners and End Users
SR-IOV enables configuration of a single physical network port to provide virtual functions (VFs) to a set of virtual machines (VMs). This article shows you how to configure SR-IOV on Intel® Ethernet Converged Network Adapters and Controllers.
Follow the steps in this article to learn how to develop, run, and profile DPDK applications on any Intel® architecture-based Windows* laptop.
As part of VNF onboarding, communications service providers often test and characterize their VNFs in standalone setups as well in complete service contexts. By enabling EPA (Enhanced Platform Awareness) features before they begin, they can maximize the utilization of their underlying Intel-based infrastructure and optimize VNF performance.
In this demonstration, we show how by enabling just a select few EPA features (such as DPDK, CPU pinning, HugePages), we were able to achieve a 5-times gain in data plane throughput for the standalone scenario, and a 9-times gain for the complete service scenario. Even further optimization is possible with EPA. After achieving the metrics that result in the desired levels of SLAs, CommSPs can update their Common Information Models (CIMs) to specify which EPA features are required vs. those that are optional. This can help streamline and simplify VNF onboarding. It also drives the ecosystem towards building VNFs that generate better performance.
The following resources provide more information on the benefits of EPA and how to enable it.
- NFVI Hardware Configurations Course in Intel® Network Builders University (a free Intel® Network Builders University account is required to access this content)
Apply Today for the Intel® Developer Zone SDN/NFV Dev Lab (Santa Clara, CA)
Network function virtualization has moved from idea to POC to implementation stage. Data plane packet processing is only part of the story of implementing an industry-standard network function. The challenge still remains to get bare metal performance from virtual machines. This one-day lab will have deep-dive sessions and hands-on labs led by experts from Intel, who will talk about the various hardware and software technologies Intel has been working on to make the life of an NFV developer easier. Select sessions will be available via webcast here.
There is no cost for the developer lab, but you must apply for consideration. The application can be found here. Please note: Your spot at the Developer Lab is not confirmed until you receive an email from Intel indicating acceptance of your application.
For updates, scheduling, and how to register, visit the event webpage.
Date: June 13, 2017
Time: 8:00 am - 7:00 pm
Location: Santa Clara, California
Platform Transformation for NFV and SDN (Ireland)
Join Out of the Box Network Developers Ireland at their next meet up on Tuesday, June 13. The topic will be about platform transformation for NFV and SDN.
For information on this event and how to register, visit the event webpage.
Date: June 13, 2017
Time: 9:30 am
Celebrate the Birthday of OpenStack* (California)
Date: July 27, 2017
At NetSoft 2017, a team of experts from Intel will present a tutorial titled "VNF Data Plane Acceleration (DPDK, FD.io)." In the tutorial, presenters will discuss how packet processing in the fast path involves looking up bit patterns and deciding on actions at line rate. This tutorial will talk about the various building blocks available to speed up packet processing—both hardware-based and software-based—and give hands-on lab experience on DPDK and FD.io fast path look up with the following sessions:
- "SDN and NFV Platform Ingredients and High Speed Packet Processing," by Sujata Tibrewala, Network Technology Evangelist at Intel.
- "DPDK Introduction and IP Pipeline Sample App Walk Through," by Muthurajan Jayakumar, Technical Marketing Engineer at Intel.
- "DPDK HASH Library Walk Through," by Saikrishna Edupuganti, Researcher at Intel Labs.
- "FD.io VPP Architecture and Demo," by Sergio Gonzalez Monroy, Network Software Engineer, Intel.
Date: July 3-7
Location: Bologna, Italy
For more information, visit the NetSoft 2017 website here.
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